Switching of logic circuits of a semiconductor die produce transient current and voltage spikes that must be decoupled or dampened. Conventional techniques to accomplish this decoupling involve discrete decoupling capacitors external to the semiconductor die. These discrete decoupling capacitors are expensive and space inefficient.
U.S. Pat. No. 5,016,087 entitled "Integrated Circuit Package" granted May 14, 1991 to Haug et al. discloses a method for providing decoupling capacitors onboard a semiconductor die that includes building wells in the semiconductor substrate and providing caps per the wells at unused areas of the semiconductor die. However, the wells require additional real estate on board the semiconductor die.